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A. Sahu (PhD CSE, IITD)Assistant ProfessorDepartment of Computer Sc. & Engg. IIT Guwahati, Assam-781039 Email:asahu(AT)iitg(.)ernet(.)in Ph:+91-3612582370 |
| Jan-Apr 2013 :CS223: Hardware Lab | Jul-Nov 2012: C431: Programming Language Lab |
| Jul-Nov 2012 :CS523: Advanced Computer Architecture | Jan-Apr 2012:CS101: Introduction to Computing |
| Jul 2011- Nov 2011:CS221:Digital Design | Jan-Apr 2011: CS223: Hardware Lab |
| Jan-Apr 2011:CS222:Computer Organization and Architecture | Jan- Apr 2011: Computer graphics |
| Jul-Nov 2010: CS421: Computer Peripheral and Interface | Jan-Apr 2010: CS223: Hardware Laboratory |
| Student Name | Project Title |
| Suresh Amrutlal Desai | Efficient Scheduler level Processor Sharing for Multiphase Applications on Tiled Multicore Architecture |
| Saswata Dutta | Implementation of Visibility Graphs on GPU |
| Chandra Mohan Sharma | Multicore Design Space Exploration for Large Skewed Application Streams |
| Navin Kumar | GPU Based Simulator for Cache Management on Tiled Buffer-Less NOC |
| Kuldeep | QoS Based Task Scheduling on Tiled MultiCore |
| Sunil Kumar | Comparison of HW Scheduling and Software Scheduling on Multicore Architecture |
| K Teja | Large Scale Molecular Dynamic Simulation on NVIDIA GPU |
| Saparapu Ramakrishna | Comparative Analysis of Cache and Bandwidth Partitioning in Multicore Architecture |
| Saurav Kumar | Benchmarking and Analysis of Work Stealing Scheduler on Clustered Multicore Architecture |
| Appa Rao Maiskar | LDS Prefetching for Shared Memory Multicore Architecture |
| Pradeep Biswal | OS Level Cache Coherence Communications Optimization using MST |
| Bhoopendra Kumar | Online Task and Data Scheduling on Large Scale 3D Stacked Multicore |
| V. Khenglawt | Scheduling Tasks on Large Multicore to Optimize Power |
| Rishav Kumar | Hardware Accelerated Kernel for Multicore Operating System |
| B Sindhuja | Multicore Performance Optimization using Helper Core/Threads |
| Tuniki Vishal Kumar | Machine Learning Based Performance Tuning for Multicore Architecture |
| Amlan Pradhan | Parallel HDL Simulation using Cilk |
| Surabhi Maheswari | QoS Optimization in Scheduling Task on Tiled Architecture |