Aryabartta Sahu (Ph.D CSE, IIT Delhi)

Associate Professor
Dept. of Comp. Sc. & Engg.
IIT Guwahati, Assam-781039
Email:asahu(AT)iitg(.)ernet(.)in
Ph:+91-3612582370
Research Interest: (a) Scheduling Problems Related to HPC/Cloud/IoT/Edge/FoG Computing, (b) Multicore System (Arch., Prog. and Scheduling) (c) Embedded System.
Professional Membership: IEEE Senior Member, ACM Member

Updated CV : CV-ABS.pdf
Courses:
Jan-Apr 2023 : High Perf. Comp. and Hardware Lab Jul-Nov 2023: Operating System
Jan-Apr 2021 : Prog. Lang. Lab*** Jul-Nov 2021: Digital Design*** Jan-Apr 2022 : High Perf. Comp.*** Jul-Nov 2022: Advanced Compiler
Jan-Apr 2019 : Intro. to Computing Jul-Nov 2019: Digital Design Jan-Apr 2020 : High Perf. Comp. Jul-Nov 2020: Python Prog. Lab
Jan-Apr 2017 :Intro. to Computing and Hardware Lab Jul-Nov 2017: High Perf. Comp. Jan-Apr 2018 :Hardware Lab Jul-Nov 2018: Digital Design and Syst. Soft. Lab
Jan-Apr 2015 :Comp. Org. and Arch. Jul-Nov 2015: Digital Design Jan-Apr 2016 : Hardware Lab Jul-Nov 2016: High Perf. Comp.
Jan-Apr 2013 :Hardware Lab Jul-Nov 2013: Prog. Lang. Lab Jan-Apr 2014 :Hardware Lab Jul-Nov 2014: Operating System
Jan-Apr 2011: Comp. Org. AND Hardware Lab Jul-Nov 2011:Digital Design Jan-Apr 2012:Intro. to Computing Jul-Nov 2012 :Adv. Comp. Arch.
Jul-Nov 2010: Comp. Peripheral Interface
PhD Students:
1 Vasanth Reddy Joined in December 2021 2 Suvarthi Sarkar Joined in July 2021
3 Shubhradeep Roy Joined in July 2021 4 K. Chitra Joined in December 2020
5 Chinmaya Swain Efficient Task Scheduling on Cloud Environment : Thesis defended on 30th July 2021 6 Rakesh Pandey Efficient Task Scheduling on Cloud Environment : Thesis defended on 30th July 2021
7 M S Vasudevan (Jointly with S Biswas) Enhancement of SBST Techniques for Detection of Processor Faults Thesis defended on 29th June 2020 8 Manojit Ghose ( Jointly with S Karmakar) Energy aware online task scheduling on multi-cores and cloud, Thesis defended on 4 Dec 2018
List of Research Projects (With MTech/BTech/PhD Students): Here
Journal Publications:
  1. Rakesh Pandey, Aryabartta Sahu: Performance and Area Trade-Off of 3D-Stacked DRAM Based Chip Multiprocessor with Hybrid Interconnect. IEEE Transaction on Emerging Topics of Computing. 9(4): 1945-1959 (2021) TETC, IF=7.691, Q1 in SCIMAJO
  2. Manoj Kumar, Aryabartta Sahu, Pinaki Mitra: A comparison of different metaheuristics for the quadratic assignment problem in accelerated systems. Applied Soft Computing. 100: 106927 (2021), ASC, IF=6.725, Q1 in SCIMAJO
  3. Chinmaya Kumar Swain, Aryabartta Sahu, Reliability Ensured Efficient Scheduling With Replication in Cloud Environment, IEEE System Journal, 2021, DOI: 10.1109/JSYST.2021.3112098, 9557876, SysJour, IF=3.91, Q1 in SCIMAJO
  4. Rakesh Pandey, Aryabartta Sahu: Run-time adaptive data page mapping: A Comparison with 3D-stacked DRAM cache. Journal of System Architecture 110: 101798 (2020), JSA, IF=3.77, Q1 in SCIMAJO
  5. Manojit Ghose, Aryabartta Sahu, Sushanta Karmakar: Urgent point aware energy-efficient scheduling of tasks with hard deadline on virtualized cloud system. Sustain. Computing: Informatics System, 28: 100416 (2020) SCIS IF=4.028, Q1 in SCIMAJO
  6. CK Swain, R Shankar, A Sahu: Edge data distribution as a network Steiner tree estimation in edge computing. Computing, 2024, Core Rank A, IF=2.95, Q1 in SCIMAJO
  7. Manojit Ghose, Sawinder Kaur, Aryabartta Sahu: Scheduling real time tasks in an energy-efficient way using VMs with discrete compute capacities. Computing 102(1): 263-294 (2020), 2020 Core Rank A, IF=2.95, Q1 in SCIMAJO
  8. Chinmaya Kumar Swain, Aryabartta Sahu: Interference Aware Workload Scheduling for Latency Sensitive Tasks in Cloud Environment. Computing 104(4): 925-950 (2022). Core Rank A, IF=2.95, Q1 in SCIMAJO
  9. Chinmaya Kumar Swain, Neha Saini, Aryabartta Sahu: Reliability aware scheduling of bag of real time tasks in cloud environment. Computing 102(2): 451-475 (2020) 2020 Core Rank A, IF=2.95, Q1 in SCIMAJO
  10. Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu: RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor Testing. J. Electron. Test.: Theory and Application 35(5): 695-714 (2019) JETTA, IF=1.01
  11. Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu: Automation of Test Program Synthesis for Processor Post-silicon Validation. J J. Electron. Test.: Theory and Application 34(1): 83-103 (2018) JETTA, IF=1.01
  12. Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu: Fragmented software-based self-test technique for online intermittent fault detection in processors. IET Comput. Digit. Tech. 15(1): 56-76 (2021), IF=0.818
  13. Chinmaya Kumar Swain, Bhawana Gupta, Aryabartta Sahu: Constraint aware profit maximization scheduling of tasks in heterogeneous datacenters. Computing 102(10): 2229-2255 (2020) 2020 Core Rank A, IF=2.95, Q1 in SCIMAJO
  14. Tarun K. Agrawal, Aryabartta Sahu, Manojit Ghose, R. Sharma: Scheduling chained multiprocessor tasks onto large multiprocessor system. Computing 99(10): 1007-1028 (2017), 2020 Core Rank A, IF=2.95, Q1 in SCIMAJO
  15. Manojit Ghose, Aryabartta Sahu, Sushanta Karmakar: Energy Efficient Online Scheduling of Real Time Tasks on Large Multi-threaded Multiprocessor Systems. J. Inf. Sci. Eng. 34(6): 1599-1615 (2018), IF=0.541
Conference Publications:
  1. Manojit Ghose, Krishna Prabin Pandey, Niyati Chaudhary, Aryabartta Sahu: Soft Reliability Aware Scheduling of Real-time Applications on Cloud with MTTF constraints, IEEE/ACM CCGrid 2023 .
  2. Shubhradeep Roy, Suvarthi Sarkar, Aryabartta Sahu, Profit Maximization using Colloborative Storage Management in Multi-tier Cloud System. IEEE HiPC 2023
  3. A Sahu, “Temperature Aware Scheduling and Mapping of Multiphase Application on to Chip Multiprocessor”, in ACM/IEEE/IFIP Design automation and Test in Europe, (DATE 2016), March 14-18 2016. (single author), One of the top conerence in Design Automation Area
  4. Aryabartta Sahu, M. Balakrishnan, Preeti Ranjan Panda: A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors. DATE 2009: 1018-1023
  5. Vivek Kumar, Chinmaya Kumar Swain, Aryabartta Sahu: Energy Efficient Dynamic Load Balancing using Self-Organized Criticality in Grid Computing. IEEE HPCC /DSS/SmartCity/DependSys 2022: 979-986, Core Ranking B Catagory
  6. Avadhesh Sharma; Chinmaya Kumar Swain; Aryabartta Sahu: Efficient Welfare Maximization in Fog-Edge Computing Environment; IEEE HPCC /SmartCity/DSS 2021, Core Ranking B Catagory
  7. Chinmaya Kumar Swain; Vaibhav Gupta; Aryabartta Sahu : Energy Efficient and QoS Aware Multi-Level Mobile Cloud Offloading, IEEE HPCC /SmartCity/DSS 2021, Core Ranking B Catagory
  8. Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu: Automated Low-Cost SBST Optimization Techniques for Processor Testing. IEEE VLSI Design 2021: 299-304
  9. Rakesh Pandey, Aryabartta Sahu: Access-Aware Self-Adaptive Data Mapping onto 3D-Stacked Hybrid DRAM-PCM Based Chip-Multiprocessor. IEEE HPCC /SmartCity/DSS 2019: 389-396, , Core Ranking B Catagory
  10. Vasudevan M. S, Santosh Biswas, Aryabartta Sahu: RSBST: A Rapid Software-Based Self-Test Methodology for Processor Testing. IEEE VLSI Design 2019: 112-117
  11. Chinmaya Kumar Swain, Aryabartta Sahu: Interference Aware Scheduling of Real Time Tasks in Cloud Environment. IEEE HPCC /SmartCity/DSS 2018: 974-979, Core Ranking B Catagory
  12. Manojit Ghose, Pratyush Verma, Sushanta Karmakar, Aryabartta Sahu: Energy Efficient Scheduling of Scientific Workflows in Cloud Environment. IEEE HPCC /SmartCity/DSS 2017: 170-177
  13. Sawinder Kaur, Manojit Ghose, Aryabartta Sahu: Energy Efficient Scheduling of Real-Time Tasks in Cloud Environment. IEEE HPCC /SmartCity/DSS 2017: 178-185
  14. Rakesh Pandey, Aryabartta Sahu: Efficient Mapping of Multi-threaded Applications onto 3D Stacked Chip-Multiprocessor. IEEE HPCC /SmartCity/DSS 2017: 324-331
  15. Aryabartta Sahu, Saparapu Ramakrishna: Creating heterogeneity at run time by dynamic cache and bandwidth partitioning schemes. ACM SAC 2014: 872-879