Research Papers in referred journals

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  1. 1. S. Mondal and R. Paily, "An Efficient On-Chip Switched-Capacitor-Based Power Converter for a Microscale Energy Transducer," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 3, pp. 254-258, March 2016. doi: 10.1109/TCSII.2015.2483159

  2. 2. A. Maddirala, R. A. Shaik, "Removal of EOG Artifacts from Single Channel EEG Signals using Combined Singular Spectrum Analysis and Adaptive Noise Canceler", in IEEE Sensors Journal, doi: 10.1109/JSEN.2016.2560219

  3. 3. Ajay Kumar Maddirala, Rafi Ahamed Shaik, "Motion artifact removal from single channel electroencephalogram signals using singular spectrum analysis", Biomedical Signal Processing and Control, Volume 30, September 2016, Pages 79-85, ISSN 1746-8094, http://dx.doi.org/10.1016/j.bspc.2016.06.017.

  4. 4. V. K. Kanchetla, R. Shrestha and R. Paily, "Multi-standard high-throughput and low-power quasi-cyclic low density parity check decoder for worldwide interoperability for microwave access and wireless fidelity standards," in IET Circuits, Devices & Systems, vol. 10, no. 2, pp. 111-120, 3 2016. doi: 10.1049/iet-cds.2014.0347

  5. 5. V. M. M., R. Paily and A. Mahanta, "A New PVT Compensation Technique Based on Current Comparison for Low-Voltage, Near Sub-Threshold LNA," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 12, pp. 2908-2919, Dec. 2015. doi: 10.1109/TCSI.2015.2486078

  6. 6. B. Rawat and R. Paily, "Analysis of Graphene Tunnel Field-Effect Transistors for Analog/RF Applications," in IEEE Transactions on Electron Devices, vol. 62, no. 8, pp. 2663-2669, Aug. 2015. doi: 10.1109/TED.2015.2441092

  7. 7. Nagesh Ch and Roy Paily,"Design of an Osmotic Pressure Sensor for Sensing Osmotically Active Substance", Journal of Micromechanics and Microengineering, IOP Publishing, Volume 25 Number 4, 045019 2015.

  8. 8. Ratul Kr Baruah and Roy Paily, "The Effect of High-k Gate Dielectrics on Device and Circuit Performances of a Junctionless Transistor" Journal of Computational Electronics, Springer, (accepted), 2015.

  9. 9. S. Kumawat, R. Shrestha, N. Daga and R. Paily, "High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques & Dynamic Multi-Frame Processing Schedule," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 5, pp. 1421-1430, May 2015. doi: 10.1109/TCSI.2015.2403032

  10. 10. Nagesh Ch and Roy Paily,"Fabrication and Testing of an Osmotic Pressure Sensor for Glucose Sensing Application", Micromachines 5, no. 3 (2014): 722-737

  11. 11. Suda, Naveen, P. V. Nishanth, Debajit Basak, Durshee Sharma and Roy Paily "A 0.5-V low power analog front-end for heart-rate detector." Analog Integrated Circuits and Signal Processing, Springer, Vol. 81 Issue 2, Pages 417-430, November 2014.

  12. 12. Rahul Shrestha and Roy Paily, “Comparative Study of Simplified MAP Algorithms and an Implementation of Non-Parallel-Radix-2 Turbo Decoder", Journal of Signal Processing Systems, Springer (2014).

  13. 13. R. Shrestha and R. P. Paily, "High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless Communication Standards," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 9, pp. 2699-2710, Sept. 2014. doi: 10.1109/TCSI.2014.2332266

  14. 14. Ratul Kumar Baruah and Roy Paily, “A Dual-Material Gate Junctionless Transistor With High-k Spacer for Enhanced Analog Performance”, IEEE Transactions on Electron Devices, Vol. 61, NO. 1, pp. 123-128, January 2014.

  15. 15. Sunil Joshi and Roy Paily,"Distributed Arithmetic based Split-Radix FFT", Springer, Journal of Signal Processing Systems: Volume 75, Issue 1 (2014), Page 85-92.

  16. 16. G. Saxena and R. Paily, "Performance Improvement of Square Microhotplate with Insulation Layer and Heater Geometry," Microsystem Technologies, Springer, pp. 1-8, 2014.

  17. 17. Ratul Kumar Baruah and Roy Paily, “A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance”, Lecture Notes in Computer Science, Springer Berlin / Heidelberg, Vol. 7373, pp 30-39, 2013.

  18. 18. Ratul Kumar Baruah and Roy Paily, “Double-gate junctionless transistor for Analog Applications", Journal of Nanoscience and Nanotechnology, Vol. 13, no. 3, 1802-1807, 2013.

  19. 19. Naga Mahesh, Akash Ganesan, Manchi Pavan Kumar and Roy Paily, “An Ultra-Wideband Baseband Transmitter Design for Wireless Body Area Network”, Lecture Notes in Computer Science, Springer Berlin / Heidelberg, Vol. 7373, pp 30-39, 2013.

  20. 20. R. Gnana Praveen and Roy Paily,"Blind Navigation Assistance for Visually Impaired Based on Local Depth Hypothesis from a Single Image", International Conference on Design and manufacturing, IConDM 2013, Procedia Engineering, Elsevier, Volume 64, pages 351 – 360, 2013

  21. 21. Nagesh Ch and Roy Paily,"High Sensitivity Microbridge for Molecular Sensing Applications", International Conference on Design and manufacturing, IConDM 2013, Procedia Engineering, Elsevier, Volume 64, Pages 234–243, 2013

  22. 22. Vimal K Mohandas and Roy Paily, "Stereo Disparity Estimation Algorithm for Blind Assisting System" CSI Transactions on ICT, Springer, Volume 1, Issue 1, Page 3-8, 2013.

  23. 23. Ratul Kr Baruah and Roy Paily, "Impact of High-k Spacer on Device Performance of a Junctionless Transistor" Journal of Computational Electronics, Springer, Volume 12, Issue 1, pp 14-19, 2013

  24. 24. K. C. Narasimhamurthy and Roy Paily, "Wafer Scale Thin-Film Transistors using Different Semiconducting Purity Nanotubes, Dielectric Materials and Gate Control" Solid State Electronics, Elsevier, Volume 79, Pages 37–44, January 2013.

  25. 25. R. Shrestha and R. Paily, "Performance and throughput analysis of turbo decoder for the physical layer of digitalvideo-broadcasting-satellite-services-tohandhelds standard," in IET Communications, vol. 7, no. 12, pp. 1211-1220, Aug. 13 2013. doi: 10.1049/iet-com.2012.0623

  26. 26. G. Saxena and R. Paily, " Analytical Modeling of Square Microhotplate for Gas Sensing Application," Sensors Journal, IEEE , vol. 13, no. 12, pp. 4851–4859, 2013.

  27. 27. G. Saxena and R. Paily, " Choice of Insulation Materials and its Effect on the Performance of Square Microhotplate ," Microsystem Technologies, Springer, pp. 1 –7 , 2013.

  28. 28. Rahul Shrestha and Roy Paily, “Design and Implementation of a Linear Feedback Shift Register Interleaver for Turbo Decoding”, Lecture Notes in Computer Science, LNCS 7373, Springer Berlin / Heidelberg, H. Rahaman et al. (Eds.): VDAT 2012, pp. 30–39, 2012.

  29. 29. N. Ramakrishnan, Ashish Kumar Namdeo, Harshal B. Nemade and Roy Paily Palathinkal, “Simplified model for FEM simulation of SAW delay line sensor,” Elsevier Procedia Engineering, Vol. 41, pp. 1022-1027, 2012

  30. 30. Abdul Raouf Khalid and Roy Paily, “FPGA Implementation of High Speed and Low Power Architectures for Image Segmentation Using Sobel Operators”, Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, Vol. 21, No. 7, 1250050 - 14 pages, 2012.

  31. 31. Ramakrishnan, N., Nemade, H.B. and Palathinkal Roy Paily, "Resonant Frequency Characteristics of a SAW Device Attached to Resonating Micropillars", Multidisciplinary Digital Publishing Institute (MDPI) Sensors 2012, 12(4), pp 3789-3797

  32. 32. N. Ramakrishnan, Harshal B. Nemade, Roy Paily Palathinkal, “Fabrication of High Aspect Ratio SU-8 Microstructures on Piezoelectric Transducers”, Journal of Applied Mechanics and Materials, Trans Tech Publications Ltd. Switzerland, Volumes 110 – 116, Pages 3127-3131, 2011.

  33. 33. N. Ramakrishnan, Harshal B. Nemade, Roy Paily Palathinkal, “Investigation on Resonance Effects of Closely Resonating Nano-Pillars Attached to SAW Resonator”, Journal of Applied Mechanics and Materials, Trans Tech Publications Ltd. Switzerland, Volumes 403 – 408, Pages 1183-1187, 2011

  34. 34. K. C. Narasimhamurthy and Roy Paily, “Fabrication and Characterization of High Performance and High Current Back Gate Thin-Film Field-Effect Transistors using Sorted Single Walled Carbon Nanotubes”, IET Circuits, Devices & Systems, Vol. 5, Iss. 5, pp 365–370, 2011.

  35. 35. K. C. Narasimhamurthy and Roy Paily, "Performance Comparison of Single Gate and Dual Gate Carbon Nanotube Thin-Film Field-Effect Transistors", IEEE Trans. on Electron Devices, Vol. 58, Issue 7, pp 1922 - 1927, June 2011

  36. 36. Ramakrishnan, N., Nemade, H.B. and Palathinkal, R.P "Mass Loading in Coupled Resonators Consisting of SU-8 Micropillars Fabricated Over SAW Devices" IEEE Journal Sensors, Vol.11, Issue 2, 430 – 431, 2011

  37. 37. K. C. Narasimhamurthy and Roy Paily, "High Performance Local Back Gate Thin-Film Field-Effect Transistors using Sorted Carbon Nanotubes on Amino-Silane Treated Hafnium-Oxide Surface", Semiconductor Science and Technology., 26 (2011)

  38. 38. K. C. Narasimhamurthy and Roy Paily, "Fabrication and Performance Comparison of Interdigitated Thin-Film Field-Effect Transistors using Different Purity Semiconducting Carbon Nanotubes", Advanced Materials Research, vol. 181-182, pp. 343-348, Jan. 2011.

  39. 39. N. Ramakrishnan, T. Vamsi, A. Khan, Harshal B. Nemade, and Roy Paily Palathinkal, "Humidity sensor using NIPAAm nanogel as sensing medium in SAW devices", International Journal of Nanoscience, 2011

  40. 40. Narasimhamurthy, K.C., Paily, R, "Fabrication of carbon nanotube field effect transistor", IETE Technical Review India, 28 (1), pp. 57-69, 2011

  41. 41. N. Ramakrishnan, Roy Paily Palathinkal, and Harshal B. Nemade, "Mass loading effects of high aspect ratio structures grown over SAW resonators", Sensor Letters, 2010, vol. 8, No. 2, pp. 253-257, Copyright © 2010 American Scientific Publishers

  42. 42. N. Ramakrishnan, Roy Paily Palathinkal, and Harshal B. Nemade, "Mass loading effects of high aspect ratio structures grown over SAW resonators", Sensor Letters, 2010, vol. 8, No. 2, pp. 253-257, Copyright © 2010 American Scientific Publishers

  43. 43. A. Ramesh Babu and Roy Paily, "Power-Delay Reduction in FPGA Implementations Using Bypassing Technique" International Journal of Recent Trends in Engineering, Vol. 4, No. 4, Nov 2010

  44. 44. Genemala Haobijam and Roy Paily, "Design of Multilevel Pyramidically Wound Symmetric Inductor for CMOS RFICs", Analog Integrated Circuits and Signal Processing, Springer, September 2009

  45. 45. Niket Agrawal and Roy Paily, "A threshold inverter quantization based folding and interpolation ADC in 0.18 μm CMOS", Analog Integrated Circuits and Signal Processing, Springer, September 2009

  46. 46. Genemala Haobijam and Roy Paily, "Performance Study of Fixed Value Inductors and their Optimization using Electromagnetic Simulator", Microwave and Optical Technology Letters, Wiley Interscience, Volume 50, Issue 5, pp 1205 – 1210, May 2008

  47. 47. Deepak Balemarthy and Roy Paily, "1.6/1.8/2.1/2.4-GHz Multiband CMOS Low Noise Amplifier, Special Issue of IETE Journal of Research on Microwave Circuits and Systems", IETE Journal of Research, Vol. 54, No 1, Jan-Feb 2008

  48. 48. Genemala Haobijam and Roy Paily, "Efficient Optimization of Integrated Spiral Inductor with Bounding of Layout Design Parameters", Analog Integrated Circuits and Signal Processing, Springer, Vol 51, no.3, pp 131-140, June 2007

  49. 49. Marathe, V. G., R. Paily, N. DasGupta and A. DasGupta, "A model to study the effect of Selective Anodic Oxidation on ultrathin gate oxides", IEEE Transactions on Electron Devices, Volume 52, Issue 1, pp 118 – 121, 2005

  50. 50. Paily, R., A. DasGupta N. DasGupta, T. Ganguli and L. M. Kukreja, "Effect of Oxygen Pressure and Laser Fluence during Pulsed Laser Deposition of TiO2 on MTOS (Metal-TiO2-SiO2-Si) Capacitor Characteristics. Thin Solid Films", 462-463, 57-62, 2004

  51. 51. Singh, R., Paily, R., A. DasGupta, N. DasGupta, P. Misra and L. M. Kukreja, "Optimized Dual Temperature Pulsed Laser Deposition of TiO2 to Realize MTOS (Metal-TiO2 -SiO2 -Si) Capacitors with Ultrathin Gate Dielectric", Semiconductor Science and Technology, 20, 38-43, 2004

  52. 52. Singh, R.; Paily, R. DasGupta, A. DasGupta, N. Misra, P. and L.M. Kukreja "Laser induced oxidation for growth of ultrathin gate oxide", Electronics Letters, 40, 1606-1607, 2004

  53. 53. Paily, R., A. DasGupta, N. DasGupta, P. Bhattacharya, P. Misra, T. Ganguli, L. M. Kukreja, A.K. Balamurugan, S. Rajagopalan and A.K. Tyagi, "Pulsed Laser Deposition of TiO2 for MOS Gate Dielectric", Applied Surface Science, 187, 297–304. 2002

  54. 54. Paily, R., A. DasGupta and N. DasGupta, "Improvement in Electrical Characteristics of Ultrathin Thermally Grown SiO2 by Selective Anodic Oxidation", IEEE Electron Device Letters, 23, 707-709, 2002

  55. 55. Paily, R., A. DasGupta and N. DasGupta, "Improvement in Electrical Characteristics of Ultrathin Thermally Grown SiO2 by Selective Anodic Oxidation", IEEE Electron Device Letters, 23, 707-709, 2002

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