Roy Paily

Dr. Roy P. Paily

Head, Centre for Nanotechnology

Professor, Department of Electronics and Electrical Engineering

IIT Guwahati

Awards

  1. "Hardware Implementation and Testing of LMAPP Decoder for High Throughput Applications" by Rahul Shrestha and Roy Paily adjudged as Best entry in Design Contest Winner of 27th International Conference on VLSI Design and the 13th International Conference on Embedded Systems, IIT Bombay, January 5th - 9th, 2014.
  2. Shri Gaurav Saxena, research scholar of the Department of Electronics and Electrical Engineering secured second position in M V Chauhan All India Student Paper Contest 2013 organized by IEEE India Council at All India Student Conference 2013 for the paper titled "Design, Fabrication and Characterization of Square Micro hot plate" by Gaurav Saxena and Roy Paily.
  3. Second position in the Best M. Tech Thesis Award 2011 in the area of VLSI and Microelectronics among the 28 Participating Institutes (PI) across India for the Thesis entitled "Design of a 0.5 V Low Power Analog Front-End for Heart-rate Detector" Naveen Suda, supervised by Dr. Roy Paily, EEE Department. The award includes cash prize for Institute, Supervisor and Student and is funded by Department of Information Technology (DIT) India through an R&D project "Special Manpower Development Program - Phase II (SMDP-II)".
  4. Second position in the Best M. Tech Thesis Award 2010 in the area of VLSI and Microelectronics among the 28 Participating Institutes (PI) across India for the Thesis entitled "Design of Multi-band CMOS Low Noise Amplifier" B.C. Deepak, supervised by Dr. Roy Paily, EEE Department. The award includes cash prize for Institute, Supervisor and Student and is funded by Department of Information Technology (DIT) India through an R&D project "Special Manpower Development Program - Phase II (SMDP-II)".
  5. "Design of Multilayer Pyramidically wound Inductor and Fully Integrated 2.4GHz VCO in UMC 0.18um RFCMOS Process" by G.Haobijam and R.Paily adjudged as Best entry in Design Contest Winner of 22nd International Conference on VLSI Design and the 8th International Conference on Embedded Systems, New Delhi, January 5th - 7th, 2009.
  6. Adjudged outstanding PhD student of the year 2004 by IBM India for the thesis "Studies on the Improved Gate Dielectrics for ULSI MOS devices".
  7. Ernakulam District First of the year 1983 in the SSLC Examination conducted by the Board of Examinations Kerala State.